The present invention relates generally to semiconductor device manufacturing and more particularly to a system and a method for controlling the selection of reticles in a process employing a plurality of reticle patterns.
In the semiconductor industry, there is a continuing trend toward high device densities. To achieve these high device densities, small features on semiconductor wafers are required. These may include the width and spacing of interconnecting lines, spacing and diameter of contact holes, and surface geometry of corners and edges.
High resolution lithographic processes are used to achieve small features. In general, lithography refers to processes for pattern transfer between various media. In lithography for integrated circuit fabrication, a silicon slice, the wafer, is coated uniformly with a radiation-sensitive film, the resist. The film is selectively exposed with radiation (such as visible light, ultraviolet light, x-rays, or an electron beam) through an intervening master template, the mask or reticle (the terms mask and reticle are used interchangeably herein), forming a particular pattern. Exposed areas of the coating become either more or less soluble than the unexposed areas, depending on the type of coating, in a particular solvent developer. The more soluble areas are removed with the developer in a developing step while the less soluble areas remain on the silicon wafer, thus forming a patterned coating. The pattern of the coating corresponds to the image, or negative image, of the reticle and is used in further processing of the silicon wafer.
Over the course of a device manufacturing process, a large number of lithographic processes are commonly employed. Each lithographic process involves a different reticle pattern; the reticles used for such processing are generally kept in cases that are labeled, with a bar code for example and/or the reticles themselves may also be labeled. Automated apparatus may be used to assist in selecting the correct reticle for a particular process step. On occasion, nonetheless, an incorrect reticle is selected and the affected wafers (those wafers processed with the incorrect reticle) are lost as defects. Therefore, their remains an unsatisfied need for systems and methods that mitigate or eliminate problems associated with incorrect reticle selection.
The following presents a simplified summary of the invention in order to provide a basic understanding of some of its aspects. This summary is not an extensive overview of the invention and is intended neither to identify key or critical elements of the invention nor to delineate its scope. The primary purpose of this summary is to present some concepts of the invention in a simplified form as a prelude to the more detailed description that is presented later.
The present invention provides a system and process for controlling the application of patterned resist coatings in an integrated circuit manufacturing process that employs multiple reticle patterns. One aspect of the invention relates to obtaining scatterometry measurements from a patterned resist and using the measurements to determine whether the correct reticle pattern was employed in forming the patterned resist. According to another aspect of the invention, the reticles are provided with grating patterns in addition to reticle patterns, whereby when the reticles are printed, gratings are formed in the resist. The gratings are then used, with scatterometry, to identify the reticle pattern. The reticles can be configured so that the gratings form in a non-functional portion of a wafer, such as a portion along a score line. Where it is determined that the correct reticle pattern was not used, an indication of the determination is provided and corrective action can be taken such as stripping the resist and reprocessing the affected wafers.